A Glasgow University expert in computer simulation could help to solve the semiconductor industry's predicted miniaturisation problems.
Asen Asenov heads the world-ranking Device Modelling Group in the department of electronics and electrical engineering. The group's work has attracted the attention of Intel, the biggest silicon chip manufacturer, and the American space agency, Nasa.
The research aims to solve fundamental problems in the silicon chips of the future - building the next generation of transistors, measured in tens of nanometers, which will allow computers to become smaller and run faster.
But Intel researchers say the Glasgow group's work could be doomed to failure. The critics foresee insurmountable barriers to the advance of Moore's Law, which states that the number of transistors per chip doubles every 18 months.
Dr Asenov and colleague John Davies use three-dimensional modelling on a large statistical scale to understand the problem better and find workable solutions, using the supercomputer complex at Nasa. They simulate the tiny transistors and see how they behave even before being able to build them.
The simulations predict that fundamental problems will arise in attempting to integrate transistors smaller than 50-30nm gate size on a single chip. These are an order of magnitude smaller than the 0.25 - 0.18 mm transistors in production.
Dr Asenov said: "Modelling these systems is expensive in terms of computing time and memory and until now it has been impossible using conventional computers. Three-dimensional modelling on statistical scale is extremely complex, and only by accessing the high-performance computing resources of Nasa can we make progress. We need to be able to simulate hundreds of different device configurations."
A fundamental problem is the randomness and discrete nature of the dopant charges (dopants are atoms of impurity added to the silicon chip to make the transistors). The number of dopants and their positions in each small transistor in the chip will be
"This means that transistors, which will be macroscopically identical, will be microscopically very different. With an average 100 dopant atoms on each one of those tiny transistors, ten dopants more or less can change the characteristics of the transistor. The threshold voltage, which is crucial for the on-off nature of all digital operations, will be different for each transistor on the chip," said Dr Asenov.
He draws an analogy with Christmas pudding. "If you have two big pieces, they will have about the same number of raisins. If you have very small pieces of pudding, one bit may have two raisins, the other may have four. Such statistical fluctuations cause the problems in very small devices."
The project already offers a better understanding of, and novel solutions to, making nano-scaled transistors of the future work better - finding better ways to "mix the Christmas pudding", by reducing variations and allowing the continued miniaturisation of the silicon chip.