School of Computer Science and Engineering is looking for a candidate to join them as a Project Officer.
The job involves the mapping of computer applications to a dedicated hardware architecture (an overlay) on a conventional FPGA. A basic overlay framework exists. The job scope will include (1) RTL design using Verilog HDL as the FPGA overlay design needs to be further developed, and (2) Mapping tool development (software design) to develop a tool chain to map applications to the overlay hardware.
The hardware/software design and development responsibilities will include performing analysis, design, coding and testing of parts of the overlay/mapping tool.
- Bachelor in Computer Science or Electrical and Electronic Engineering.
- Demonstrated programming knowledge in C, C++ or Python; FPGA design using Verilog HDL/ VHDL; Excellent written and verbal English communication skills.
- Bachelor degree candidates with appropriate skills and some working experience may also be considered.
- Minimum 1 year experience for Bachelor’s degree applicants.
- Bachelor degree candidates with appropriate skills but no working experience may also be considered.
We regret that only shortlisted candidates will be notified.